STS frame-ATM cell circuit emulation apparatus and frame length compensation method for the same

ABSTRACT

A circuit simulation apparatus is disclosed by which, even if an STS-N frame of an abnormal length is detected by a reassembly buffer, the frame length can be compensated for while preventing an overflow of the reassembly buffer. When an STS-(N×M) frame formed by multiplexing M STS-N frames formed from different channels is cellularized into ATM cells or M different STS-N frames assembled from ATM cells are multiplexed into an STS-(N×M) frame, an ATM cell sync signal and ATM cell data from a buffer section are outputted as a frame pulse signal and frame data from a reassembly section to a circuit termination section, and frame length compensation of the frame pulse signal and the frame data is performed by the reassembly section.

BACKGROUND OF THE INVENTION

[0001] 1. Field of the Invention

[0002] The present invention relates to a circuit emulation apparatusfor cellularizing an STS (Synchronous Transmission Signal) frame of theSTM (Synchronous Transmission Mode) into ATM (Asynchronous TransferMode) cells and multiplexing ATM cells into an STS frame, and moreparticularly to a circuit emulation apparatus and a frame lengthcompensation method by which an AU pointer (Administrative Unit pointer)rewriting system for keeping the frame length fixed even if an abnormalSTS frame length is detected.

[0003] 2. Description of the Related Art

[0004] The structure of an STS-1 frame as an example of STS-N frame isshown in FIG. 3. Referring to FIG. 3, the STS-1 frame 208 shown includesan RSOH (Regenerator Section Over Head) 201 composed of 3 columns ×3rows, an AU-3 pointer 202 composed of one column ×3 rows, an MSOH(Multiplex Section Over Head) 203 composed of 5 columns ×3 rows, and anSTS-1 payload 207 composed of 9 columns ×87 rows.

[0005] The STS-1 payload 207 is formed from a POH (Path Over Head) 204composed of 9 columns ×1 row, a payload 205 composed of 9 columns ×28rows, and a fixed stuff byte 206 composed of 9 columns ×1 row. The POH204 is formed from J1, B3, C2, G1, F2, H4, Z3, Z4 and Z5. The J1signifies a position designated by the AU-3 pointer 202.

[0006] The structure of the AU-3 pointer is shown in FIG. 4. Referringto FIG. 4, the AU-3 pointer 301 is composed of an H1 byte, an H2 byteand an H3 byte. The H1 byte is composed of 8 bits. The bits 7 to 4 forma new data flag 302 indicative of whether or not the AU-3 pointer hasbeen changed, the bits 3 to 2 form an AU type 303 indicative of an AUtype, and the bits 1 to 0 form a pointer value 304 indicative of thepointer value.

[0007] The H2 byte is composed of 8 bits. The bits 7 to 0 form a pointervalue 305 indicative of a pointer value. The H3 byte is composed of 8bits. The bits 7 to 0 form a negative stuff action 306 for stuffingoperation.

[0008] A multiplexed structure of an STS-3 frame formed from three STS-1frames is shown in FIG. 5. It is to be noted that the RSOH and the MSOHare omitted in FIG. 5. In the following description, the RSOH and theMSOH are removed from an STS-1 frame and an STS-3 frame.

[0009] Particularly, FIG. 5 illustrates that different channel data ofan STS-1 frame (#1) 413, another STS-1 frame (#2) 414 and a furtherSTS-1 frame (#3) 415 are multiplexed into an STS-3 frame 424.

[0010] The STS-1 frame 413 is formed from an AU-3 pointer 401 and anSTS-1 payload 410. The STS-1 frame 414 is formed from an AU-3 pointer402 and an STS-1 payload 411. The STS-1 frame 415 if formed from an AU-3pointer 403 and an STS-1 payload 412. The STS-3 frame 424 is formed froman AU-pointer 416 composed of one column ×9 rows, and a payload 423composed of 9 columns ×261 rows.

[0011] In the multiplexing, first the AU-3 pointer 401, AU-3 pointer 402and AU-3 pointer 403 are multiplexed in order of #1-H1, #2-H1, #3-H1,#1-H2, #2-H2, #3-H2, #1-H3, #2-H3 #3-H3 into the AU-pointer 416.

[0012] Then, a POH 405 formed from 9 columns ×1 row in the STS-1 payload410 is multiplexed into a POH 420 composed of 9 columns ×1 row in thepayload 423; a POH 407 formed from 9 columns ×1 row in the STS-1 payload411 is multiplexed into a POH 421 composed of 9 columns ×1 row in thepayload 423; a POH 409 composed of 9 columns ×1 row in the STS-1 payload412 is multiplexed into a POH 422 composed of 9 columns ×1 row in thepayload 423; a POH 404 composed of 9 columns ×1 row in the payload 410is multiplexed into a POH 417 composed of 9 columns ×1 row in thepayload 423; a POH 406 composed of 9 columns ×1 row in the STS-1 payload411 is multiplexed into a POH 418 composed of 9 columns ×1 row in thepayload 423; and a POH 408 composed of 9 columns ×1 row in the STS-1payload 412 is multiplexed into a POH 419 composed of 9 columns ×1 rowin the payload 423.

[0013] The structure of ATM cells for one period upon structured datatransfer is shown in FIG. 6. FIG. 6 shows the structure of an ATM cellwhere it includes an ATM header 501 composed of 5 bytes, an SAR-PDU(Segmentation And Reassembly-Protocol Data Unit) header 502 composed of1 byte, a structured pointer 503 composed of 1 byte, and a payload 504formed from 46 bytes.

[0014]FIG. 6 illustrates that eight ATM cells each formed from an ATMheader 501 composed of 5 bytes, an SAR-PDU header 502 composed of 1 byteand a payload 505 composed of 47 bytes are transferred as ATM cells forone period by structured data transfer.

[0015] The ATM header 501 are composed of totaling 5 bytes including aVPI (Virtual Path Identifier) composed of 12 bits, a VCI (VirtualChannel Identifier) composed of 16 bits, a PT (Payload Type) composed of3 bits, a CLP (Cell Loss Priority) composed of 1 bit and an HEC (HeaderError Control) composed of 8 bits.

[0016] The SAR-PDU header 502 is formed from an SN (Sequence Number) 506composed of 4 bits, and an SNP (Sequence Number Protection) 507 composedof 4 bits. The SN values in the SAR-PDUs of the 53 bytes ×8 ATM cellsare allocated in order of 0, 1, 2, 3, 4, 5, 6, 7.

[0017] The structured pointer 503 is included in an ATM cell whose SNvalue represents one of 0, 2, 4 and 6 (even-numbered bytes) andindicates the top of the STS-N frame. It is to be noted that thestructured pointer 503 is allocated only to one place in the eight ATMcells in the 53 bytes ×8 ATM cells.

[0018] From the foregoing, the circuit emulation apparatus cellularizes,for example, an STS-3 frame formed by multiplexing three STS-1 framesformed from different channels in accordance with the cell format ofFIG. 6 as illustrated in FIG. 5 or multiplexes three different STS-1frames assembled from ATM cells shown in FIG. 5 into an STS-3 frame.

[0019] It is to be noted that the circuit emulation apparatus cansimilarly cellularize an STS-(N×M) frame (except the RSOH and the MSOH:in the following expression, the RSOH and the MSOH are excepted from anSTS-(N×M) frame) formed by multiplexing M (M is an any integer) STS-N (Nis any integer) frames (except the RSOH and the MSOH: in the followingexpression, the RSOH and the MSOH are excepted from an STS-N frame)formed from different channels into ATM cells in accordance with thecell format of FIG. 6 or an multiplex M different STS-N frames assembledfrom ATM cells into an STS-(N×M) frame.

[0020] Now, a multiplexing method by the circuit emulation describedabove is described.

[0021]FIG. 7 illustrates a multiplexed structure (when a frame of anabnormal length is generated) of an STS-3 frame from three STS-1 frames.Particularly, FIG. 7 illustrates multiplexing of different channel dataof an STS-1 frame (#1) 601, another STS-1 frame (#2) 602 and a furtherSTS-1 frame (#3) 603 into an STS-3 frame 604.

[0022] For example, referring to FIG. 7, when the circuit emulationapparatus multiplexes three STS-1 frames into an STS-3 frame, if theframe length of the Nth frame of the STS-1 frame (#1) 601 is abnormaland the circuit emulation apparatus detects the abnormal length frame,then the payload in the N+1 th frame of the STS-1 frame (#1) 601 isallocated to an AU-pointer 605. In this instance, the AU-pointer valuewhich originally is in the AU-pointer 605 is allocated to a payload 606in the N+1 th frame.

[0023] To eliminate this, a method is available wherein, when anabnormal length frame is detected by a segmentation section in a circuitemulation apparatus, the frame of the abnormal length is converted as itis into an ATM cell and a reassembly section in the circuit emulationapparatus inserts dummy data using a buffer to compensate for the framelength.

[0024] However, mere insertion of dummy data gives rise to the followingproblem.

[0025] In particular, it is assumed here that, when an STS-3 frameformed by multiplexing three STS-1 frames formed from different channelsis cellularized into ATM cells or three different STS-1 frames assembledfrom ATM cells are multiplexed into an STS-3 frame, a frame of anabnormal length is inputted to a segmentation section in a circuitemulation apparatus.

[0026] In this instance, if the abnormal length frame is cellularized asit is into ATM cells and the ATM cells are inputted from an ATM switchto a reassembly buffer, then since no drop or loss of data of the frameoccurs between the segmentation section to the reassembly sectionalthough the frame length is abnormal, if the reassembly section insertsdummy data in order to compensate for the frame length, then the amountof data stored into the reassembly buffer increases.

[0027] Therefore, if a frame of a similar abnormal length appears by aplurality of numbers of times, then the stored amount in the reassemblybuffer increases by an amount equal to the dummy data inserted, andfinally, the reassembly buffer will suffer from an overflow.

[0028] A similar problem occurs also where an STS-(N×M) frame formed bymultiplexing M STS-N frames formed from different channels iscellularized into ATM cells or M different STS-N frames assembled fromATM cells are multiplexed into an STS-(N×M) frame.

SUMMARY OF THE INVENTION

[0029] It is an object of the present invention to provide a circuitemulation apparatus and a frame length compensation method by which,when an STS-(N×M) frame formed by multiplexing M STS-N frames formedfrom different channels is cellularized into ATM cells or M differentSTS-N frames assembled from ATM cells are multiplexed into an STS-(N×M)frame, even if an STS-N frame of an abnormal length is detected, theframe length can be compensated for while preventing an overflow of areassembly buffer in the circuit emulation apparatus.

[0030] In order to attain the object described above, according to anaspect of the present invention, there is provided an STS frame-ATM cellcircuit emulation apparatus for cellularizing an STS-(N×M) formed bymultiplexing M STS-N frames formed from different channels into ATMcells and multiplexing M different STS-N frames assembled from ATM cellsinto an STS-(N×M) frame, comprising circuit termination means forinputting and outputting frame data from and to a circuit, buffer meansfor inputting and outputting an ATM cell sync signal and ATM cell datafrom and to an ATM switch, and segmentation means and reassembly meansconnected between the circuit termination means and the buffer means,the circuit termination means outputting frame data from the circuit asa frame pulse signal and frame data to the segmentation means, thesegmentation means outputting the frame pulse signal and the frame datafrom the circuit termination means as an ATM cell sync signal and ATMcell data to the buffer means, the buffer means temporarily storing andthen outputting the ATM cell sync signal and the ATM cell data from thesegmentation means to the ATM switch, the buffer means temporarilystoring and then outputting the ATM cell sync signal and the ATM celldata from the ATM switch to the reassembly means, the reassembly meansdetecting a frame of an abnormal length from the ATM cell sync signaland the ATM cell data from the buffer means, compensating, when a frameof an abnormal length is detected, for the frame length of the framewith a next frame and outputting a resulting frame as a frame pulsesignal and frame data to the circuit termination means.

[0031] The reassembly means may include a VPI/VCI supervision sectionfor supervising a VPI/VCI in an ATM cell header of the ATM cell syncsignal and the ATM cell data, a structured pointer supervision sectionfor supervising structured pointer information indicating the top of anSTS frame to detect an abnormal length of the frame, a decellularizationsection for extracting an AU-pointer value and payload data values froman ATM payload in an ATM cell and decellularizing the AU-pointer valueand the payload data values for each frame, and an AU-pointer rewritingsection for compensating, when the structured pointer supervisionsection detects an abnormal length of the frame, for the abnormal lengthof the frame with the payload of the next frame and rewriting theAU-pointer value.

[0032] The STS frame-ATM cell circuit emulation apparatus may beconstructed such that the VPI/VCI supervision section receives the ATMcell sync signal and the ATM cell data inputted thereto from the ATMswitch, identifying data for the individual channels and outputtingstructured pointer values distributed for the individual channels to thestructured pointer supervision section, and the structured pointersupervision section detects the structured pointer values of theindividual channels, outputs the structured pointer values as structuredpointer information to the AU-pointer rewriting section, checks theframe length based on the structured pointer values and transmits, whena frame of an abnormal length is detected, an abnormal length framesignal to the AU-pointer rewriting section, whereafter the AU-pointerrewriting section detects a data byte number corresponding to theabnormal length of the frame based on the abnormal length frame signaland compensating for the frame length with the payload of the nextframe.

[0033] When the AU-pointer rewriting section compensates for the framelength with the payload data of the next frame, the AU-pointer rewritingsection may rewrite the AU-pointer value for the frames next to theframe with which the abnormal length is detected.

[0034] The frame of the abnormal length may be a short frame or a longframe.

[0035] According to another aspect of the present invention, there isprovided a frame length compensation method for an STS frame-ATM cellcircuit emulation apparatus for cellularizing an STS-(N×M) formed bymultiplexing MSTS-N frames formed from different channels into ATM cellsand multiplexing M different STS-N frames assembled from ATM cells intoan STS-(N×M) frame, comprising the steps of outputting frame data from acircuit received by circuit termination means as a frame pulse signaland frame data to segmentation means, outputting the frame pulse signaland the frame data from the circuit termination means as an ATM cellsync signal and ATM cell data to buffer means, temporarily storing intothe buffer means and then outputting the ATM cell sync signal and theATM cell data from the segmentation means to an ATM switch, temporarilystoring into the buffer means and then outputting an ATM cell syncsignal and ATM cell data from the ATM switch to the reassembly means,and detecting a frame of an abnormal length from the ATM cell syncsignal and the ATM cell data, compensating, when a frame of an abnormallength is detected, for the frame length of the frame with a next frameby the reassembly means and outputting a resulting frame as a framepulse signal and frame data from the reassembly means to the circuittermination means.

[0036] The reassembly means may supervise a VPI/VCI in an ATM cellheader of the ATM cell sync signal and the ATM cell data, supervisestructured pointer information indicating the top of an STS frame todetect an abnormal length of the frame, extract an AU-pointer value andpayload data values from an ATM payload in an ATM cell anddecellularizes the AU-pointer value and the payload data values for eachframe, and compensate, when an abnormal length of the frame is detected,for the abnormal length of the frame with the payload of the next frameand rewrites the AU-pointer value.

[0037] The frame length compensation method may be constructed such thatthe ATM cell sync signal and the ATM cell data inputted from the ATMswitch are received and data for the individual channels are identifiedand then structured pointer values distributed for the individualchannels are outputted, and the structured pointer values of theindividual channels are detected and the frame length is checked basedon the structured pointer values and then, when a frame of an abnormallength is detected, an abnormal length frame signal is generated,whereafter a data byte number corresponding to the abnormal length ofthe frame is detected based on the abnormal length frame signal and theframe length is compensated for with the payload of the next frame.

[0038] When the frame length is compensated for with the payload data ofthe next frame, the AU-pointer value for the frames next to the framewith which the abnormal length is detected may be rewritten.

[0039] With the circuit simulation apparatus and the frame lengthcompensation method, a frame of an abnormal length is detected from anATM cell sync signal and ATM cell data from the buffer means, and whenthe frame has an abnormal length, its frame length is compensated forwith a next frame. Consequently, even if the reassembly buffer in thecircuit simulation apparatus detects a frame of an abnormal length, theframe length can be compensated for while preventing the reassemblybuffer from suffering from an overflow.

[0040] The above and other objects, features and advantages of thepresent invention will become apparent from the following descriptionand the appended claims, taken in conjunction with the accompanyingdrawings in which like parts or elements are denoted by like referencesymbols.

BRIEF DESCRIPTION OF THE DRAWINGS

[0041]FIG. 1 is a block diagram showing a circuit emulation apparatus towhich the present invention is applied;

[0042]FIG. 2 is a diagrammatic view illustrating a multiplexing andframe length compensation method of the circuit emulation apparatus ofFIG. 1;

[0043]FIG. 3 is a diagrammatic view showing an example of a conventionalSTS-1 frame structure;

[0044]FIG. 4 is a diagrammatic view showing a structure of an AU-3pointer of the STS-1 frame structure of FIG. 3;

[0045]FIG. 5 is a diagrammatic view (except the RSOH and the MSOH)showing a multiplexed structure of an STS-3 frame from three STS-1frames having the STS-1 frame structure of FIG. 3;

[0046]FIG. 6 is a diagrammatic view showing an ATM cell structure forone period upon structured data transfer (SDT) where the STS-1 framestructure of FIG. 3 is employed; and

[0047]FIG. 7 is a diagrammatic view (except the RSOH and the MSOH)showing a multiplexed structure of an STS-3 frame from three STS-1frames having the STS-1 frame structure of FIG. 3 when a frame of anabnormal length appears.

DESCRIPTION OF THE PREFERRED EMBODIMENT

[0048] Referring to FIG. 1, there is shown a circuit emulation apparatusto which the present invention is applied. The circuit emulationapparatus shown is generally denoted at 101 and includes a circuittermination section 102, a segmentation section 103, a reassemblysection 104, and a buffer section 105.

[0049] The circuit termination section 102 outputs frame data from anexternal circuit as a frame pulse signal and frame data. Further, thecircuit termination section 102 outputs frame data to the externalcircuit.

[0050] The segmentation section 103 outputs a frame pulse signal andframe data from the circuit termination section 102 as an ATM cell syncsignal and ATM cell data. The buffer section 105 temporarily stores theATM cell sync signal and the ATM cell data from the segmentation section103 and the outputs them to an external ATM switch. Further, the buffersection 105 temporarily stores an ATM cell sync signal and ATM cell datafrom the ATM switch and then outputs them.

[0051] The reassembly section 104 outputs an ATM cell sync signal andATM cell data from the buffer section 105 as a frame pulse signal andframe data to the circuit termination section 102. The reassemblysection 104 includes a VPI/VCI supervision section 106, a structuredpointer supervision section 107, a decellularization section 108, and anAU-pointer rewriting section 109.

[0052] The VPI/VCI supervision section 106 supervises the VPI/VCI in theATM cell header. The structured pointer supervision section 107extractsstructured pointer information explicitly indicating the top of an STSframe and supervises the period of the structured pointer information.

[0053] The decellularization section 108 extracts an AU-pointer valueand payload data values from the ATM payload in an ATM cell and manages(decellularizes) them separately for each frame. The AU-pointerrewriting section 109 rewrites the AU-pointer value if a variation ofthe detected period of the structured point value is detected.

[0054] Now, operation of the circuit emulation apparatus 101 having sucha configuration as described above is described.

[0055] First, the VPI/VCI supervision section 106 of the reassemblysection 104 shown in FIG. 1 receives an ATM cell sync signal 110 and ATMcell data 111 inputted thereto from the ATM switch and identifies datafor each channel. After the channels are identified by the VPI/VCIsupervision section 106, the data are distributed for the individualchannels and the data 112 of the individual channels are transmitted tothe structured pointer supervision section 107. The structured pointersupervision section 107 detects structured pointer values for theindividual channels and transmits structured pointer information 114 tothe AU-pointer rewriting section 109.

[0056] Thereupon, the structured pointer supervision section 107 checksthe frame length based on the structured pointer value. If a frame of anabnormal length is detected, then the structured pointer supervisionsection 107 transmits a abnormal length frame signal 113 whichindicates, for example, if the frame of an abnormal length is a shortframe, by what quantity the frame data is short to the AU-pointerrewriting section 109.

[0057] The AU-pointer rewriting section 109 detects the data byte numberby which the short frame is short and compensates for the frame lengthwith payload data of a next frame. Further, the AU-pointer rewritingsection 109 rewrites the AU-pointer value for succeeding frames to theframe detected as the short frame.

[0058] Here, detailed operation of the AU-pointer rewriting section 109is described. It is to be noted that the following description relatesto the operation when a short frame appears as described hereinabovewith reference to FIG. 7.

[0059] As seen in FIG. 2, the circuit emulation apparatus 101 of FIG. 1receives ATM cells corresponding to an STS-1 frame 701 wherein frames inthe form of the STS-1 frame 701 appear successively and the N+1 th frameis a short frame. In this instance, when the reassembly section 104reassembles ATM cells corresponding to the STS-1 frame 701 wherein theN+1 th frame is a short frame, since the N+1 th frame at a point of time703 prior to AU-pointer rewriting is a short frame, the AU-pointerrewriting section 109 receives an amount of the abnormal length framesignal 113 and the structured pointer information 114 transmitted fromthe structured pointer supervision section 107 of FIG. 1 which is equalto the quantity of data by which the N+1 th frame is short. Then, theframe length is compensated for with payload data of the N+2 th framefor the short data. Also the frames beginning with the N+2 th frame areprocessed similarly.

[0060] However, since the frame length corresponding to the data shortin the N+1 th frame at the time 703 prior to AU-pointer rewriting iscompensated for with payload data of the N+2 th frame, the AU-3 pointervalue of the AU-3 pointer 3-707 is moved to the AU-3 pointer 3-709 inthe N+2 th frame at a time 704 after AU-pointer rewriting (also thepayload 3-711 is slid forwardly by an amount equal to the number ofbytes by which the AU-3 pointer 3-707 is moved) so that the position ofthe J1 byte 708 indicated by the AU-3 pointer 3-707 in the N+2 th frameat the time 703 prior to AU-pointer rewriting. Further, the AU-pointervalue of the AU-pointer 3-709 is rewritten so that the AU-3 pointer3-709 may designate the J1 byte 710.

[0061] In this instance, the decellularization section 108 of FIG. 1receives the ATM cell sync signal 110 and the ATM cell data 111 from theATM switch, extracts the payload of the ATM cell data 111 other than theATM header, SAR-PDU header and structured pointer and performsdecellularization of the payload as described hereinabove with referenceto FIG. 6.

[0062] It is to be noted that, if the frames beginning with the N+2 thframe in the form of the STS-1 frame 701 of FIG. 2 are normal, if theAU-pointer is not rewritten, then the position of the J1 byte indicatedby the AU-pointer is displaced. Therefore, the byte number of data bywhich they are short when a short frame appears at the N+1 th frame inthe form of the STS-1 frame 701 is stored. Further, based on the bytenumber of the short data, frame compensation and rewriting of theAU-pointer value in the frames beginning with the N+2 th frame in theform of the STS-1 frame 701 is performed.

[0063] Also when one of the frames beginning with the N+2 th frame inthe form of the STS-1 frame 701 of FIG. 2 is abnormal (for example, ashort frame), if the AU-pointer is not rewritten, then the position ofthe J1 byte indicated by the AU-pointer is displaced. Therefore, thebyte number of short data when the short frame appears at the N+1 thframe in the form of the STS-1 frame 701 is stored. Then, the bytenumber is compared with the byte number of short data when the shortframe appears at the N+2 th frame in the form of the STS-1 frame 701,and a result of the comparison is used for frame compensation andrewriting of the AU-pointer value in the frames beginning with the N+2th frame in the form of the STS-1 frame 701.

[0064] In this manner, in the present embodiment, when an STS-(N×M)frame formed by multiplexing M STS-N frames formed from differentchannels is cellularized into ATM cells or M different STS-N framesassembled from ATM cells are multiplexed into an STS-(N×M) frame, an ATMcell sync signal and ATM cell data from the buffer section 105 areoutputted as a frame pulse signal and frame data to the circuittermination section 102 and frame length compensation for the framepulse signal and the frame data is performed by the reassembly section104. Consequently, even if an abnormal length frame of an STS-N frame isdetected by the reassembly buffer in the circuit emulation apparatus101, the frame length can be compensated for while preventing thereassembly buffer from suffering from an overflow.

[0065] This is because, when M STS-N frames assembled from ATM cells aremultiplexed into an STS-(N×M) frame by the circuit emulation apparatus101, even if the frame length of any STS-N frame is abnormal,compensation for the frame length and rewriting of the AU-pointer valueare performed based on payload data of a succeeding frame or frames.

[0066] It is to be noted that, while the foregoing description relatesto operation where an STS-1 frame is a short frame, similar operationcan be performed also where an STS-1 frame is a long frame. Similaroperation can be performed also when a short frame or a long frame isdetected where it is an STS-N frame.

[0067] While a preferred embodiment of the present invention has beendescribed using specific terms, such description is for illustrativepurpose only, and it is to be understood that changes and variations maybe made without departing from the spirit or scope of the followingclaims.

What is claimed is:
 1. An STS frame-ATM cell circuit emulation apparatusfor cellularizing an STS-(N×M) formed by multiplexing MSTS-N framesformed from different channels into ATM cells and multiplexing Mdifferent STS-N frames assembled from ATM cells into an STS-(N×M) frame,comprising: circuit termination means for inputting and outputting framedata from and to a circuit; buffer means for inputting and outputting anATM cell sync signal and ATM cell data from and to an ATM switch; andsegmentation means and reassembly means connected between said circuittermination means and said buffer means; said circuit termination meansoutputting frame data from the circuit as a frame pulse signal and framedata to said segmentation means; said segmentation means outputting theframe pulse signal and the frame data from said circuit terminationmeans as an ATM cell sync signal and ATM cell data to said buffer means;said buffer means temporarily storing and then outputting the ATM cellsync signal and the ATM cell data from said segmentation means to theATM switch, said buffer means temporarily storing and then outputtingthe ATM cell sync signal and the ATM cell data from the ATM switch tosaid reassembly means; said reassembly means detecting a frame of anabnormal length from the ATM cell sync signal and the ATM cell data fromsaid buffer means, compensating, when a frame of an abnormal length isdetected, for the frame length of the frame with a next frame andoutputting a resulting frame as a frame pulse signal and frame data tosaid circuit termination means.
 2. An STS frame-ATM cell circuitemulation apparatus as claimed in claim 1, wherein said reassembly meansincludes: a VPI/VCI supervision section for supervising a VPI/VCI in anATM cell header of the ATM cell sync signal and the ATM cell data; astructured pointer supervision section for supervising structuredpointer information indicating the top of an STS frame to detect anabnormal length of the frame; a decellularization section for extractingan AU-pointer value and payload data values from an ATM payload in anATM cell and decellularizing the AU-pointer value and the payload datavalues for each frame; and an AU-pointer rewriting section forcompensating, when said structured pointer supervision section detectsan abnormal length of the frame, for the abnormal length of the framewith the payload of the next frame and rewriting the AU-pointer value.3. An STS frame-ATM cell circuit emulation apparatus as claimed in claim2, wherein said VPI/VCI supervision section receives the ATM cell syncsignal and the ATM cell data inputted thereto from the ATM switch,identifying data for the individual channels and outputting structuredpointer values distributed for the individual channels to saidstructured pointer supervision section, and said structured pointersupervision section detects the structured pointer values of theindividual channels, outputs the structured pointer values as structuredpointer information to said AU-pointer rewriting section, checks theframe length based on the structured pointer values and transmits, whena frame of an abnormal length is detected, an abnormal length framesignal to said AU-pointer rewriting section, whereafter said AU-pointerrewriting section detects a data byte number corresponding to theabnormal length of the frame based on the abnormal length frame signaland compensating for the frame length with the payload of the nextframe.
 4. An STS frame-ATM cell circuit emulation apparatus as claimedin claim 3, wherein, when said AU-pointer rewriting section compensatesfor the frame length with the payload data of the next frame, saidAU-pointer rewriting section rewrites the AU-pointer value for theframes next to the frame with which the abnormal length is detected. 5.An STS frame-ATM cell circuit emulation apparatus as claimed in claim 3,wherein the frame of the abnormal length is a short frame or a longframe.
 6. A frame length compensation method for an STS frame-ATM cellcircuit emulation apparatus for cellularizing an STS-(N×M) formed bymultiplexing M STS-N frames formed from different channels into ATMcells and multiplexing M different STS-N frames assembled from ATM cellsinto an STS-(N×M) frame, comprising the steps of: outputting frame datafrom a circuit received by circuit termination means as a frame pulsesignal and frame data to segmentation means; outputting the frame pulsesignal and the frame data from said circuit termination means as an ATMcell sync signal and ATM cell data to buffer means; temporarily storinginto said buffer means and then outputting the ATM cell sync signal andthe ATM cell data from said segmentation means to an ATM switch;temporarily storing into said buffer means and then outputting an ATMcell sync signal and ATM cell data from the ATM switch to saidreassembly means; and detecting a frame of an abnormal length from theATM cell sync signal and the ATM cell data, compensating, when a frameof an abnormal length is detected, for the frame length of the framewith a next frame by said reassembly means and outputting a resultingframe as a frame pulse signal and frame data from said reassembly meansto said circuit termination means.
 7. A frame length compensation methodas claimed in claim 6, wherein said reassembly means: supervises aVPI/VCI in an ATM cell header of the ATM cell sync signal and the ATMcell data; supervises structured pointer information indicating the topof an STS frame to detect an abnormal length of the frame; extracts anAU-pointer value and payload data values from an ATM payload in an ATMcell and decellularizes the AU-pointer value and the payload data valuesfor each frame; and compensates, when an abnormal length of the frame isdetected, for the abnormal length of the frame with the payload of thenext frame and rewrites the AU-pointer value.
 8. A frame lengthcompensation method as claimed in claim 7, wherein the ATM cell syncsignal and the ATM cell data inputted from the ATM switch are receivedand data for the individual channels are identified and then structuredpointer values distributed for the individual channels are outputted,and the structured pointer values of the individual channels aredetected and the frame length is checked based on the structured pointervalues and then, when a frame of an abnormal length is detected, anabnormal length frame signal is generated, whereafter a data byte numbercorresponding to the abnormal length of the frame is detected based onthe abnormal length frame signal and the frame length is compensated forwith the payload of the next frame.
 9. A frame length compensationmethod as claimed in claim 8, wherein, when the frame length iscompensated for with the payload data of the next frame, the AU-pointervalue for the frames next to the frame with which the abnormal length isdetected is rewritten.
 10. A frame length compensation method as claimedin claim 8, wherein the frame of the abnormal length is a short frame ora long frame.